1. Field of the Invention
The present invention relates to thermal processing of substrates, and in particular relates to laser thermal processing of substrates to activate doped regions formed therein in the manufacture of semiconductor devices such as integrated circuits (ICs).
2. Description of the Prior Art
Thermal processing (TP) (also referred to as laser thermal processing or LTP, and laser thermal annealing or LTA) is a technique for rapidly annealing source/drain diffusions formed in silicon wafers as part of the process for fabricating semiconductor devices such as integrated circuits (ICs). The principle objective of thermal processing is to produce shallow doped regions with very high conductivity by rapidly heating the wafer to temperatures near the semiconductor melting point in order to incorporate implanted atoms (dopants) at substitutional lattice sites, and then rapidly cool the wafer to “freeze” the dopants in place. This results in low-resistivity doped regions, which translates into faster ICs. It also results in an abrupt change in dopant atom concentration with depth as defined by the implant process, since thermal diffusion plays only a very minor role in the rearrangement of the impurity atoms in the lattice structure. This also serves to improve the electrical characteristics of the resulting transistors.
Conventional laser thermal processing utilizes a high power CO2 laser beam (the “annealing beam”), which is raster scanned over the wafer surface such that all regions of the surface are exposed to at least one pass of the annealing beam. The wavelength of the CO2 laser is in the infrared region at λ=10.6 μm. This wavelength, combined with the incidence angle and the polarization of the beam, serves to provide a very uniform absorption across the wafer and results in each point on the wafer being subject to very nearly the same maximum temperature. The long wavelength of the beam and the shallow angle of incidence combine to minimize diffraction effects from the pre-existing structures on the wafer further improving the processing temperature uniformity.
This heating-uniformity advantage is accompanied by a disadvantage in that lightly-doped, high-resistivity, silicon wafers do not significantly absorb the 10.6 μm wavelength of the annealing beam and so are not significantly heated. This is because the photon energy of the 10.6 μm radiation is less than the semiconductor (silicon) bandgap energy.
One approach to overcoming the failure to couple the beam with the substrate during thermal processing is to pre-heat the wafer to a temperature where the equilibrium density of electrons and/or holes in the undoped/lightly-doped regions is sufficient to cause absorption of a significant fraction of incident annealing radiation.
The wafer pre-heat temperature needed to achieve the necessary free carrier concentration in silicon to cause substantial annealing radiation beam absorption near the wafer surface is approximately 400° C. Consequently, the wafer pre-heat method for performing thermal processing involves pre-heating the entire Wafer to approximately 400° C. by placing it on a heated vacuum chuck prior to scanning the annealing radiation beam over the wafer surface. While effective, this technique necessarily involves maintaining the entire wafer at the chuck temperature except for the small area beneath the annealing radiation beam. This is problematic because the resistivity of activated highly doped regions of the wafer slowly increases when subjected to an elevated temperature after these regions are annealed. In particular, subjecting a silicon semiconductor process wafer to a temperature of 400° C. for one minute is sufficient to produce an undesirable increase in resistivity. Thus, in practice, the resistivity of the last-scanned junctions is lower than that of the first-scanned junctions, resulting in an undesirable across-wafer variation in resistivity.
Another drawback of maintaining the wafer at a high background temperature during thermal processing is that none of the junctions on the wafer are quenched to a sufficiently low temperature (e.g., room temperature) where the interstitial dopant is frozen in the silicon lattice in a manner that achieves maximum conductivity.
An approach to performing thermal processing in a manner that eliminates the need to maintain the wafer at a relatively high background temperature has been proposed. The approach involves scanning a high powered pre-heating radiation beam from an LED array ahead of the annealing radiation beam to pre-heat a region of the wafer to approximately 400° C. or higher immediately prior to the arrival of the annealing radiation beam. While this approach removes the need for 400° C. background heating, the power and position of the pre-heating radiation beam relative to the annealing radiation beam needs to be accurately controlled and their relative positions switched when the scanning direction is switched. Accordingly, a relatively complex system is needed to switch the pre-heating radiation beam from one side of the annealing radiation beam to the other as the scan direction is reversed. Further, the alignment of the pre-heating radiation beam relative to the annealing radiation beam is fairly critical because the time constant for cooling the heated surface is relatively short.